1. Field of the Invention
The present invention relates to a switching power supply device and, more particularly, the present invention relates to a circuitry which improves heat dissipation efficiency for an integrated switching power supply.
2. Description of the Related Art
Accompanying an increasing global warming phenomenon, energy saving for reducing CO2 which is the cause of the global warming phenomenon is a task in every scene. In the field of a power supply in particular, an energy-saving power supply is common knowledge. That is, a highly efficient converting method is very significant, and many highly efficient converting methods are used for a switching power supply. Also inside an image forming apparatus, a high efficiency is provided by replacing, for example, a charging high-voltage power supply with a switching power supply type. Further, replacement with a switching power supply increases the number of components and makes an arrangement of the components complicated, and therefore a power supply control system is also integrated. Particularly, similar to the charging high-voltage power supply, a power supply of comparatively low power consumption is known to employ a configuration where driver FETs are built in an integrated circuit.
FIG. 15 is a configuration diagram of a driver section and a filter when driver FETs are built in an integrated circuit in a conventional switching power supply. In FIG. 15, a PCHFET 112 and an NCHFET 111 which are the driver FETs are a high-side driver and a low-side driver, and are driven by pulse width modulation signals PWM_H and PWM_L, respectively. A PWMO is an output signal of the integrated circuit, and is connected to a coil 115 of the filter. The coil 115 and a capacitor 116 of the filter are arranged on a power supply board, and an output OUT of the filter is supplied to a load 113. Naturally, the cutoff frequency of the filter is set lower than frequencies of PWM signals. FIG. 2 illustrates voltage characteristics of an output OUT for a common PWM signal. An output voltage becomes high in proportion to the duty ratio (high period/(high period+low period)) of the PWM signal. Generally, part of the output voltage is fed back and is compared with a setting value to control the output voltage.
An operation of the switching power supply in FIG. 15 will be described with reference to FIGS. 16 to 18. Generally, in case where drive signals are shared with the high-side driver and the low-side driver, at an instant when the drive signal has a midpoint potential between a power supply and GND, the high-side driver and the low-side driver are conducted at the same time as illustrated in FIG. 16 and a through current flows. To prevent this through current, a (dead time) method is used of generally providing a drive signal of the high-side driver and a drive signal of the low-side driver respectively, and preventing the drivers from being turned on at the same time by slightly shifting switching timings of the drive signals. FIG. 17 is a view illustrating timings of dead times. In FIG. 17, (1) is on-periods of the PCHFET 112, (2) is on-periods of the NCHFET 111 and the other periods are dead times.
In FIG. 18, changes of the voltage, the current and power consumption at each timing in the switching power supply will be described. First, in a state before a period a, the PCHFET 112 is turned on, the current flows from the PCHFET to the capacitor 116 and the PCHFET is consuming power. As to the direction of the current, the direction of arrows in FIG. 15 is positive. In the period a, when the PWM_H becomes high, the PCHFET is turned off, the potential of the PWMO transitions to GND or less due to back electromotive force of inductance characteristics of the coil 115 in FIG. 15. When the potential of the PWMO in this case is lower than a threshold voltage of the NCHFET 111 with respect to the GND, the NCHFET 111 is conducted and the current flows from the GND to the PWMO (coil 115) (period a). During the period a, the current flowing in the NCHFET 111 and the back electromotive force of the coil 115 gradually become lower. Next, when the PWM_L becomes high and the dead time ends, on-resistance of the NCHFET 111 decreases (period b). During the period b, the potential of the PWMO becomes higher than the GND, and the current flowing in the NCHFET 111 becomes a positive value. Next, when the PWM_L becomes low and the NCHFET 111 is turned off, the potential of the PWMO then becomes higher than a power supply VCC due to the back electromotive force of the coil 115. When the potential of the PWMO becomes higher than a threshold voltage of the PCHFET 112 with respect to the power supply VCC, the PCHFET 112 is conducted, and the current flows from the PWMO (coil 115) to the power supply VCC (period c). During the period c, the current flowing in the PCHFET 112 and the back electromotive force of the coil 115 gradually become lower. Next, when the PWM_H becomes low and the dead time ends, on-resistance of the PCHFET 112 decreases (period d). During the period d, the potential of the PWMO becomes lower than the power supply VCC, and the current flowing in the PCHFET 112 becomes a positive value. The above operation is repeated. The change of power consumed in the driver FETs is illustrated in the lowermost part of FIG. 18. When it is assumed that there is no through current, power consumption maximizes in, for example, the period a and the period c in which on-resistance of the drivers becomes great. Generally, it is demanded to shorten these periods as much as possible, prevent the through current and suppress power consumption as a whole.
In order to set dead times of a pair of switching elements of an inverter to appropriate times in which no through current is produced, Japanese Patent Application Laid-open No. 2003-284352 discloses a method of decreasing a dead time TD in which a pair of switching elements of the inverter are commanded to turn off, by ΔTD per predetermined time TS, finding on-resistance of a second switching element based on the current flowing in the second switching element upon switch-on and an applied voltage V* of a motor in process of decreasing the dead time TD, stopping a decrease of the dead time TD when the on-resistance significantly changes rapidly, and setting and fixing the dead time TD to a dead time TD immediately before the on-resistance of the second switching element significantly changes rapidly.
However, conventional integrated circuits require power supplies for four colors in case of a tandem type, and therefore, if driver FETs for four colors are built in, the amount of heat generation due to on-resistance of the driver FETs is likely to exceed the amount of allowable heat of a package of the integrated circuit, and some heat dissipation measure is generally adopted. For example, although a ceramic package of high heat dissipation characteristics is used or a heat dissipation fin is mounted, there is a problem that cost increases in both cases.
Further, the conventional technique disclosed in Japanese Patent Application Laid-open No. 2003-284352 does not solve the problem that the amount of heat generation due to on-resistance of driver FETs exceeds the amount of allowable heat of the package of the integrated circuit.
Therefore, there is a need for a switching power supply device that reduces the amount of heat generation of the integrated circuit that includes the drivers FETs.